%! Detailed register description file for PCICFG.EXE by Ralf Brown
%!
%! Filename 80867010.PCI = Vendor 8086h, Device 7010h -- Intel 82371 IDE Ctrlr 
%! Last Edit 1/18/97 by Ralf Brown
%!

Everything preceding a line beginning with the six characters "!begin" is
a comment and will be ignored (with the proviso that the total file size
not exceed 64K).  Everything from the !begin line to a line starting with
the four characters "!end" forms part of the device description, in a
format similar to that used for printf().

[See file BLANK.PCI for description of formatting specification and how
to create your own device descriptions.]


!begin
Intel 82371FB/SB IDE Controller registers in detail:
  Bus Master Interface Base Address: %[20:31-0]8x
  IDE timing modes
	primary channel:
	   %[40:15]|dis;en|abled
	   slave timing register %[40:14]|dis;en|abled
	   IORDY sampled %[40:13-12]{5432} clocks after DIOx#
	   recovery time after IORDY is %[40:9-8]{4321} clock(s)
	   drive 0 enable: %[40:7]/DMA/ %[40:6]/prefetch,post/ %[40:5]/IORDY sampling/ %[40:4]/fast-timing/
	   drive 1 enable: %[40:3]/DMA/ %[40:2]/prefetch,post/ %[40:1]/IORDY sampling/ %[40:0]/fast-timing/
	secondary channel:
	   %[42:15]|dis;en|abled
	   slave timing register %[42:14]|dis;en|abled
	   IORDY sampled %[42:13-12]{5432} clocks after DIOx#
	   recovery time after IORDY is %[42:9-8]{4321} clock(s)
	   drive 0 enable: %[42:7]/DMA/ %[42:6]/prefetch,post/ %[42:5]/IORDY sampling/ %[42:4]/fast-timing/
	   drive 1 enable: %[42:3]/DMA/ %[42:2]/prefetch,post/ %[42:1]/IORDY sampling/ %[42:0]/fast-timing/
 Slave IDE timing:	  %[44]2x
	primary drive 1:
	   IORDY sampled %[44:3-2]{5432} clocks after DIOx#
	   recovery time after IORDY is %[44:1-0]{4321} clock(s)
	secondary drive 1:
	   IORDY sampled %[44:7-6]{5432} clocks after DIOx#
	   recovery time after IORDY is %[44:4-4]{4321} clock(s)
!end

; everything between the above !end line and a following !enum line (not
; yet implemented) is also a comment

!enum ToBeImplemented

%! end of file