S O U N D B L A S T E R D e v e l o p e r K i t D o c u m e n t a t i o n (From paper to file by NMR 1991. Complete documentation) (Sections 1 - 7 and 10 are not included, because they don't contain any usefull info! - Erwin.) ========================================================================= TABLE OF CONTENTS HARDWARE TECHNICAL REFERENCE Chapter 8 Programming the DSP Chapter 9 DSP Interface for Voice Chapter 11 DSP Commands Chapter 8 PROGRAMMING THE DSP Introduction .................................8-3 Resetting DSP ................................8-4 Writing to DSP ...............................8-5 Reading from DSP .............................8-5 Handling interrupt from DSP ..................8-6 8-1 ========================================================================== PROGRAMMING THE DSP Introduction The Sound Blaster has a DSP Chip (CT-DSP 1321) wich handles all the voice I/O and MIDI operations. The DSP is programmed through 4 specific I/O adresses wich are selectable on the Sound Blaster Card (SBC). These I/O adresses are: a. RESET Port-output to 2x6H. b. READ DATA Port-input from 2xAH. c. WRITE COMMAND or DATA-output to 2xCH. WRITE-BUFFER status-input from 2xCH. d. DATA-AVAILABLE status-input from 2xEH. "x" is the number of the jumper selectable from 1 to 6, wich specifies the base adress of the SBC as 210H, 220H, 230H, 240H, 250H, 260H. The DSP also provides a hardware interrupt for some of its functions. This interrupts is selectable from 2, 3, 5 or 7. Within the interrupt service routine, the DSP AVAILABLE Status Port (2xEH) is read to acknowledge the interrupt. 8-3 ========================================================================== Resetting DSP ------------- The DSP has to be reset once before it is programmed. The reset causes it to perform an initialization. After the initialization, DSP returns a data byte 0AAH at the READ DATA Port. (Refer to the section on Reading Data from DSP) Procedure to reset DSP: a. Write a "1" to RESET Port (2x6H) and wait for 3 micro-seconds. b. Write a "0" to RESET Port. c. Poll for a READY BYTE = 0AAH from the READ DATA PORT (2xAH). Before reading 2xAH, it is advisable to check the DATA AVAILABLE status at port 2xEH, i.e. MSB (most significant bit) If the return value is not 0AAH after about 100 loops, or there is no return value at all, it may be a reset error or an incorrect I/O adress is being used. The routine should abort the loop and declare an error. Typically, the DSP takes about 100 micro-seconds to initialize itself. 8-4 ========================================================================== Writing to DSP -------------- The DSP's WRITE COMMAND/DATA Port (2xCH) is used to write command/data to the DSP. Before a command/data is written to DSP, the most significant bit (MSB) of WRITE BUFFER status Port (input 2xCH) must be checked to ensure that the DSP is ready to receive the command or data. The DSP is ready to receive command/data only when the MSB of the WRITE BUFFER status is a "0". Procedure to write to DSP: a. Read the DSP's WRITE BUFFER status-Port 2xCH. b. Repeat (a) until the MSB read is "0". c. Write the data to the WRITE COMMAND/DATA Port. Reading from DSP ---------------- Data is read from the DSP through the READ DATA Port (2xAH). Before the data is read, the MSB of DATA AVAILABLE status Port (2xEH) is checked to see that data is ready for reading. When the MSB of DATA AVAILABLE status Port (2xEH) is checked to see that data is ready for reading. When the MSB of DATA AVAILABLE status is a "1", data can be read from the READ DATA Port (2xAH). Procedure to read from DSP: a. Read the DSP's DATA AVAILABLE Status Port (2xEH). b. Repeat (a) until the MSB is a "1". c. Read the data from DSP's READ DATA Port (2xAH). 8-5 ========================================================================= Handling Interrupt from DSP DSP provides hardware interrupt for the following functions: a. DMA mode for DAC b. DMA mode for ADC c. Interrupt mode for MIDI input An interrupt service routine has to be set up to process the interrupt. Within the interrupt service routine, the interrupt is acknowledged by reading the DATA AVAILABLE Status Port (2xEH) once. For functions that DSP provides data to read (interrupt mode MIDI input), the data is read from the READ DATA Port (2xAH). (Note:the interrupt has to be acknowledged after the data is read). At the end of the interrupt service routine, the command 20H (EOI, End Of Interrupt) is output to the interrupt controller port 20H. 8-6 ========================================================================== Chapter 9 DSP INTERFACE FOR VOICE Operation Mode....................................9-3 Direct Mode......................................9-3 DMA Mode.........................................9-4 Sampling Rate.....................................9-5 Direct Mode......................................9-5 DMA Mode.........................................9-5 Voice Data Size...................................9-7 Programming the DMAC..............................9-8 End of DMA Interrupt.............................9-11 Use of Reference Byte............................9-12 Summary..........................................9-13 9-1 ========================================================================== DSP Interface for Voice In order to program the DSP for digitized sound input/output, this section must be read in detail. It can only be skipped when you are calling the CT-VOICE.DRV for voice I/O. This section assumes that you have certain knowledge of programming the interrupt service routine and the DMA (DMA controller 8237). Operation Mode -------------- DSP provides functions for digitized voice input and output in 2 modes: a. Direct mode b. DMA mode Direct mode ----------- In direct mode, voice data is output to our input from DSP directly by the application program. All the data are handled in a 8-bit format. 9-3 ========================================================================== DMA mode -------- Under the DMA mode, the Channel 1 of the DMAC on the CPU is programmed to transfer the data between the memory and the DSP. This frees the application program for other tasks. Besides the 8-bit data format, DSP supports 3 additional compressed data format for voice output. The digitized voice can be compressed by software to save disk and memory space. The DSP decompresses the data during voice output. This has a clear advantage in that the CPU need not spend time decompressing the data and memory wasted to store the decompressed data. The compression schemes used are: a. 4-bit DAC (2 to 1 compression) b. 2.6-bit DAC (3 to 1 compression) c. 2-bit DAC (4 to 1 compression) 9-4 ========================================================================== Sampling Rate ------------- Depending on the mode of operation-Direct or DMA, the sampling rate is handled differently. Direct mode ----------- Sampling rate depends on the number of data read from or written to the DSP at a constant interval within a second. For example, to record voice at 8000HZ sampling rate, the program has to perform 8000 ADC at equal interval within a second. Usually, the Timer interrupt (INT 8) is used to faciliate this implementation. The frequency of the interrupt is reprogrammed, so that, it interrupts at the number of time needed for that particular sampling rate. A new Timer interrupt service routine is used to read the ADC data from or write the DAC data to the DSP. There is no minimum sampling rate in this case and the maximum depends on how fast the Timer interrupt can be programmed and the interrupt service routine can service the interrupt. DMA mode -------- Under DMA mode, the sampling rate is controlled by the DSP. The DSP uses a one-byte variable, called TIME_CONSTANT, to generate the DMA request for the DMA Controller on the system to transfer the data. The TIME_CONSTANT variable is set by the DSP command's 40H. It only requires to be set once, unless sampling rate needs to be changed. 9-5 ========================================================================== The formula for the TIME_CONSTANT is as follow: TIME_CONSTANT=256-1000000/sampling rate Eg. For a 8000Hz sampling rate, TIME_CONSTANT = 256-1000000/8000 = 131 Due to the difference in complexity of each scheme, the maximum sampling rate for each scheme varies: Input(ADC) : 8-bit only, 4 KHz to 12 KHz Output(ADC): 8-bit, 4 KHz to 23 KHz 4-bit ADPCM, 4 KHz to 12 KHz 2.6-bit ADPCM, 4 KHz to 13 KHz 2-bit ADPCM, 4 KHz to 11 KHz Note: Setting to a sampling rate that is beyond the capability of that mode will result in no increase in actual sampling rate. 9-6 ========================================================================== Voice Data Size --------------- Theoretically, for the Direct and DMA mode, the size of voice data can be transferred is limited by the size of memory buffer available on the system for the voice data. For Direct mode, since the data is output/input directly by the application program through the DSP, the size of data to be transferred is handled by the application program. Under the DMA mode, the DATA_LENGTH is used as a 2-byte parameter for any of the voice input/output command. The LSB (least significant byte) of the DATA_LENGTH is written to the DSP after the command and followed by the MSB. The DATA_LENGTH is defined as: DATA_LENGTH=actual number of data - 1. For example, to transfer 1 byte of data, DATA_LENGTH = 0. To transfer a full 64KB of data, DATA_LENGTH = 65535 (FFFFH). Note: 1. Due to the characteristic of the DMAC, the actual size of data to transfer at a time is limited only by the physical page boundary, wich is 64KB at maximum. 2. The details on how to transfer data beyond 64KB is left to a later section. 9-7 ========================================================================== Programming the DMAC -------------------- The discussion here only provides brief instructions on programming the DMAC (8237) for transferring the data between the memory and the DSP. To have a better understanding of programming the DMAC (DMA Controller), refer to its Data Sheet. Two unique characteristics of the DMA have to be discussed. a. The DMAC can only transfer data within a physical memory page. The system memory is divided into physical page of 64KB each. For a 1 MB memory, it is divided into 16 pages as follows: Page Segment:Offset Adress 0 0000:0000-0000:FFFF 1 1000:0000-1000:FFFF 2 2000:0000-2000:FFFF : : : : : : E E000:0000:E000:FFFF F F000:0000:F000:FFFF As an example, a set of voice data stored at the segment-offset adress 6C00:0000 to 6C00:5FFF is actually residing in 2 physical pages: - The ending part of physical page 6 from offset C000H onwards. - The beginning part of page 7 until offset 1FFFFH. 9-8 ========================================================================== The DMAC (DMA controller) cannot be programmed to transfer this set of data in one go as they are not within the same physical page. It must be handled as 2 blocks. Therefore, a set of voice data has to be divided into sub-blocks at the physical page boundary. This limits the maximum number of data that can be transferred each time to 64KB. b. The DMAC's data counter is always 1 byte less than the actual number of bytes to transfer. This is how the DATA_LENGTH for the DSP, discussed in previous section, is being defined. The parameters for programming the DMAC are: a. Page Number - The physical page adress of the data for DMA. b. Base Adress - A 2-byte value for the offset adress of the data in the physical page. The LSB comes first, then the MSB. c. Data Counter - A 2-byte value for the DATA_LENGTH as defined in a previous section. LSB comes first also. d. Transfer Mode - A byte that indicates the direction of transfer (read from or write to memory), direction of memory adress change and other parameters. The value to use are: For voice input, (DAC) -49H For voice output, (ADC) -45H 9-9 ========================================================================== The DMAC is programmed through a few I/O ports. The procedure is listed below: a. out 0AH with 5; mask off channel 1 b. out 0CH with 0; clear byte pointer F/F to lower byte c. out 0BH with 49H; set transfer mode to DAC, for ADC, it is 45H d. out 02H with LSB of Base Adress e. out 02H with MSB of Base Adress f. out 83H with Page Number g. out 03H with LSB of Data Counter h. out 03H with MSB of Data Counter i. out 0AH with 1; enable channel 1 Note: The DMAC must be programmed before the DSP is programmed for the DMA transfer. 9-10 ========================================================================== End of DMA Interrupt -------------------- The DSP is designed to provide a hardware interrupt at the end of each DMA transfer. The actual interrupt number selectable from 2, 3, 5 and 7 on the card. (Refer to the Installation Note for detail) For voice data that resides in more than one physical page, it must be divided into sub-blocks at the page boundary for transfer. When the interrupt occurs after transferring each sub-blocks, the interrupt service routine programs the DMAC and the DSP to transfer next sub-block, until all the blocks are transferred. This solves the problem of a voice data that crosses the physical page boundary, be it more than 64K or not. The actions of the interrupt service routine are as follow: a. Preserve machine status b. Acknowledge the DSP interrupt c. Goto (f), if no more blocks to transfer d. Program the DMAC for next block e. Program the DSP for next block f. Output EOI(End of Interrupt) to Interrupt Controller at I/O port 20H g. Restore machine status h. Execute an IRET Note: 1. The hardware interrupt is also enabled/disabled by the Interrupt Register of the DMAC at I/O port (21H). 2. Application program has to clear/set the corresponding bit on the port for the interrupt number used. MSB (bit 7) for interrupt 7 and LSB (bit 0) for interrupt 0. 9-11 ========================================================================== Use Of Reference Byte --------------------- The compression scheme used by DSP is known as ADPCM (Adaptive Delta Pulse Code Modulation). This scheme stores the difference between data values instead of actual data. The first byte of the compressed data is always a REFERENCE byte wich is not the ADPCM code but the actual data byte value. This byte is used by the DSP as a reference during the decompression of the data. A separate set of ADPCM DAC commands are used to identify the REFERENCE byte in a data block. As the compressed data may be sent to the DSP in a few sub-blocks, due to page crossing problem discussed earlier, and only the first block contains the REFERENCE byte. The different ADPCM DAC commands for each compression scheme are shown below: (Refer to each command's specification for more detail) 旼컴컴컴컴컴컴컫컴컴컴컴컴컴컴컴컴컫컴컴컴컴컴컴컴컴컴커 � Compression � with � without � � Scheme � REFERENCE Byte � REFERENCE Byte � 쳐컴컴컴컴컴컴컵컴컴컴컴컴컴컴컴컴컵컴컴컴컴컴컴컴컴컴캑 � 4-bit � 75H � 74H � � � � � � 2.6-bit � 77H � 76H � � � � � � 2-bit � 7BH � 7AH � 읕컴컴컴컴컴컴컨컴컴컴컴컴컴컴컴컴컨컴컴컴컴컴컴컴컴컴켸 9-12 ========================================================================== Summary ------- The procedure to output voice (DAC) is listed below: a. Progra the TIME_CONSTANT for the DSP, if necessary b. Setup the interrupt service routine to handle the End of DMA interrupt c. Program the DMAC for the voice output, with 49H as the mode register value d. Unmask the Interrupt Mask Register at I/O port 21H e. Program the DSP to output the first sub-block with a REFERENCE byte, if the compressed data is used f. At each interrupt service, output subsequent block until all blocks are output g. When all blocks are output, mask the Interrupt Mask Register h. Restore the original interrupt service routine 9-13 ========================================================================== The procedure to input a voice (ADC) is listed below: a. Program the TIME_CONSTANT for the DSP, if necessary b. Setup the interrupt service routine to handle the End of DMA interrupt c. Program the DMAC for the voice input, with 45H as the mode register value d. Unmask the Interrupt Mask Register at I/O port 21H e. Program the DSP to input the first sub-block f. At each interrupt service, input next sub-block until memory buffer full g. Mask the Interrupt Mask Register h. Restore the original interrupt service routine 9-14 ========================================================================== ========================================================================= Chapter 11 DSP COMMMANDS Command: 1xH...................................11-3 Command: 2xH...................................11-5 Command: 3xH...................................11-3 Command: 40H...................................11-5 Command: 7xH...................................11-3 Command: DxH...................................11-5 DMA Control....................................11-10 Summary of DSP Commands........................11-12 Summary of DSP I/O Ports.......................11-13 11-1 ========================================================================== DSP Commands Command: 1xH Description: 8-bit DAC & 2-bit ADPCM DAC 旼컴컴컴쩡컴컴컴컴컫컴컴컴컴컴쩡컴컴컴컴컫컴컴컴컴컴커 퀂tatus � BIT-3 � BIT-2 � BIT-1 � BIT-0 � 쳐컴컴컴탠컴컴컴컴컵컴컴컴컴컴탠컴컴컴컴컵컴컴컴컴컴캑 � 1 � 컴 � DMA � 2-BIT � REFERENCE � � � � � MODE � ADPCM BYTE� � � � � � � � 0 � 컴 � 컴 � 8-BIT � DIRECT � � � � � UNPACKED � MODE � 읕컴컴컴좔컴컴컴컴컨컴컴컴컴컴좔컴컴컴컴컨컴컴컴컴컴켸 Commands & Functions 10H : DIRECT 8-BIT DAC (single byte transfer) 14H : DMA mode 8-BIT DAC 16H : DMA mode 2-BIT ADPCM DAC 17H : DMA mode 2-BIT ADPCM DAC with REFERENCE BYTE 10H : DIRECT mode DAC The interface program is responsible for controlling the sampling rate. (NB:DIRECT mode 2-bit ADPCM DAC is not available) (1) Send Command 10H (2) Send single byte of data (3) Wait for the correct timing and repeat (1) & (2) until end of transfer 11-3 ========================================================================== 14H : DMA mode 8-BIT DAC (1) Load data for DAC to memory (2) Set up DMAC (8237) for DMA operation (Refer to the section on Programming the DMAC) (3) Set the DSP TIME_CONSTANT to the desired sampling rate (Refer to Command 40H) (4) Send Command 14H (5) Send DATA_LENGTH (2 bytes, LSB first) where DATA_LENGTH + 1 is the size of the data block to transfer (6) Transfer of the whole block (blocksize=DATA_LENGTH+1) starts immediately after (5) (7) Break larger blocks that crosses 64K-memory page into smaller blocks and send subsequent blocks via the END_DMA interrupt service routine. 16H/17H: DMA mode 2-BIT ADPCM DAC (1) Load data for DAC to memory (2) Set up DMAC (8237) for DMA operation (3) Set the DSP TIME_CONSTANT to the desired sampling rate (4) Send Command 17H (indicating first DAC byte in memory is a REFERENCE byte) (5) Send DATA_LENGTH (2 bytes, LSB first) (6) Transfer of the whole block(blocksize=DATA_LENGTH+1) starts immediately after (5) (7) Break larger blocks that crosses the 64K-memory page into smaller blocks and send subsequent blocks via the END_DMA interrupt (8) Subsequent blocks should be send by the 16H command since there is no REFERENCE byte in them Remark: Processing MIDI OUT and DAC together. Only in DMA mode can the DAC be processed simultaneously with the MIDI OUT 11-4 ========================================================================== Command: 2xH Description: ADC INPUT The ADC (Analog-Digital Convertor) input comes from a microphone amplifier. A microphone can be plugged directly to the topmost socket on the back of the card. ADC is 8-bit either in DIRECT or DMA modes. 旼컴컴컴쩡컴컴컴컴컫컴컴컴컴컴쩡컴컴컴컴컫컴컴컴컴컴커 퀂tatus � BIT-3 � BIT-2 � BIT-1 � BIT-0 � 쳐컴컴컴탠컴컴컴컴컵컴컴컴컴컴탠컴컴컴컴컵컴컴컴컴컴캑 � 1 � 컴 � DMA � 컴 � 컴 � � � � MODE � � � � � � � � � � 0 � 컴 � 컴 � 컴 � DIRECT � � � � � � MODE � 읕컴컴컴좔컴컴컴컴컨컴컴컴컴컴좔컴컴컴컴컨컴컴컴컴컴켸 Commands & Functions 20H : DIRECT ADC (Single Byte Data Transfer) 24H : DMA mode ADC 20H : DIRECT MODE ADC (1) Send Command 20H (2) Read single byte of ADC DATA from DSP (3) Wait for the correct timing and repeat (1) & (2) until end of transfer 24H : DMA mode ADC (1) Send Command 24H (2) Send DATA_LENGTH (2 bytes, LSB first) to DSP (3) Break larger blocks that crosses the DMA page into sub-blocks and request a new sub-block for DMA input at the END_DMA interrupt service routine (4) Repeat (1), (2) & (3) until end of transfer All data digitized are 8-bit, compressed to 4-bit, 2-bit or 2.6-bit are done by the VOXKIT.EXE software. 11-5 ========================================================================== Command: 3xH Description: Reading and Writing the MIDI Port The MIDI port described here is a basic MIDI port that conforms to the specifications of the International MIDI Association. 旼컴컴컴쩡컴컴컴컴컫컴컴컴컴컴쩡컴컴컴컴컫컴컴컴컴컴커 퀂tatus � BIT-3 � BIT-2 � BIT-1 � BIT-0 � 쳐컴컴컴탠컴컴컴컴컵컴컴컴컴컴탠컴컴컴컴컵컴컴컴컴컴캑 � 1 � WRITE � 컴 � 컴 � INTERRUPT � � � � � � READ � � � � � � � � 0 � READ � 컴 � 컴 � 컴 � � � � � � � 읕컴컴컴좔컴컴컴컴컨컴컴컴컴컴좔컴컴컴컴컨컴컴컴컴컴켸 There are 3 modes available: 30H : MIDI READ (polling mode) 31H : MIDI READ (interrupt mode) 38H : MIDI WRITE (polling mode) 30H : MIDI READ (polling mode) Issue this command followed by reading a MIDI data byte from READ DATA port (2xAH) of the DSP. The program must check bit 7 (=1) of the DATA AVAILABLE status port (2xEH) before reading. If no MIDI data is available, the program must repeatedly poll the status bit until MIDI data is available. 31H : MIDI READ (interrupt mode) This is the suggested mode of reading MIDI data. Send Command 31H. When a MIDI data is available, the DSP will interrupt the CPU. An Interrupt Service Routine must be set up to read the MIDI data. The MIDI data is read from the READ DATA port, then a read on the status port (2xEH) will clear the Interrupt Request IRQ (2, 3, 5 & 7). Send Command 31H again to stop the process. 11-6 ========================================================================== Note: If MIDI data comes in too rapidly, the DSP can buffer up to 64 bytes of MIDI data. 38H : MIDI WRITE Issue Command 38H followed by one byte of the MIDI data to write. Program must check the WRITE-BUFFER STATUS PORT (2xCH) for bit 7=0, before writing any command or data. 11-7 ========================================================================== Command: 40H Description: SET THE TIME CONSTANT 旼컴컴컴쩡컴컴컴컴컫컴컴컴컴컴쩡컴컴컴컴컫컴컴컴컴컴커 퀂tatus � BIT-3 � BIT-2 � BIT-1 � BIT-0 � 쳐컴컴컴탠컴컴컴컴컵컴컴컴컴컴탠컴컴컴컴컵컴컴컴컴컴캑 � 1 � 컴 � 컴 � 컴 � 컴 � � � � � � � � � � � � � � 0 � 컴 � 컴 � 컴 � 컴 � � � � � � � 읕컴컴컴좔컴컴컴컴컨컴컴컴컴컴좔컴컴컴컴컨컴컴컴컴컴켸 Sampling rate for DAC and ADC in DMA modes is set by setting the TIME_CONSTANT of the DSP. Command & Function 40H : SET TIME CONSTANT (1) Send Command 40H (2) Send one byte TIME_CONSTANT TIME_CONSTANT = 256-1000000/8000 = 131 Eg. Required sampling rate of 8000Hz TIME_CONSTANT = 256-1000000/8000 = 131 Lowest sampling rate possible : 3906.25 Hz when TIME_CONSTANT = 0 11-8 ========================================================================== Command : 7xH Description: 4-bit ADPCM DAC & 2.6-BIT ADPCM DAC 旼컴컴컴쩡컴컴컴컴컫컴컴컴컴컴쩡컴컴컴컴컫컴컴컴컴컴커 퀂tatus � BIT-3 � BIT-2 � BIT-1 � BIT-0 � 쳐컴컴컴탠컴컴컴컴컵컴컴컴컴컴탠컴컴컴컴컵컴컴컴컴컴캑 � 1 � 컴 � DMA � 2.6-BIT � REFERENCE � � � � MODE � ADPCM � BYTE � � � � � � � � 0 � 컴 � 컴 � 4-BIT � 컴 � � � � � ADPCM � � 읕컴컴컴좔컴컴컴컴컨컴컴컴컴컴좔컴컴컴컴컨컴컴컴컴컴켸 Commands & Functions 74H : DMA mode 4-bit ADPCM DAC 75H : DMA mode 4-bit ADPCM DAC with REFERENCE BYTE 76H : DMA mode 2.6-bit ADPCM DAC 77H : DMA mode 2.6-bit ADPCM DAC with REFERENCE BYTE Remarks: Procedure is similiar to Command 1xH. 11-9 ========================================================================== Command: DxH Description: DMA & SPEAKER CONTROL Commands & Functions D0H : HALT DMA D1H : TURN ON SPEAKER D3H : TURN OFF SPEAKER D4H : CONTINUE DMA SPEAKER CONTROL 旼컴컴컴쩡컴컴컴컴컫컴컴컴컴컴쩡컴컴컴컴컫컴컴컴컴컴커 퀂tatus � BIT-3 � BIT-2 � BIT-1 � BIT-0 � 쳐컴컴컴탠컴컴컴컴컵컴컴컴컴컴탠컴컴컴컴컵컴컴컴컴컴캑 � 1 � 컴 � 컴 � SPEAKER � 컴 � � � � � OFF � � � � � � � � � 0 � 컴 � 컴 � SPEAKER � 컴 � � � � � ON � � 읕컴컴컴좔컴컴컴컴컨컴컴컴컴컴좔컴컴컴컴컨컴컴컴컴컴켸 D1H : TURN ON SPEAKER The speaker here refers to the connection of the DAC output to the amplifier input. When Speaker is ON, it means that the DAC's output is sent to the amplifier for output to the speaker. It does not affect the C/MS music or FM music. D3H : TURN OFF SPEAKER The DAC is disconnected from the speaker, no sound from the DSP will be heard. The ON/OFF SPEAKER commands could be used to mute the voice output during a game. Since most game action could be dependent on the voice output. The OFF SPEAKER command will mute the voice, but the DSP will carry on the voice output as usual without affecting the game action. 11-10 ========================================================================== DMA Control: 旼컴컴컴쩡컴컴컴컴컫컴컴컴컴컴쩡컴컴컴컴컫컴컴컴컴컴커 퀂tatus � BIT-3 � BIT-2 � BIT-1 � BIT-0 � 쳐컴컴컴탠컴컴컴컴컵컴컴컴컴컴탠컴컴컴컴컵컴컴컴컴컴캑 � 1 � 컴 � CONTINUE � 컴 � 0 � � � � DMA � � � � � � � � � � 0 � 컴 � HALT � 컴 � 0 � � � � DMA � � � 읕컴컴컴좔컴컴컴컴컨컴컴컴컴컴좔컴컴컴컴컨컴컴컴컴컴켸 D0H : HALT DMA HALT the DMA operation that could be going on between the DSP and the CPU. The DSP will cease to send out DMA request for any DMA mode of operation. D4H : CONTINUE DMA Continue the halted DMA operation. 11-11 ========================================================================== Summary of DSP Commands 旼컴컴쩡컴컴컴컴컴컴컴컴컴컴쩡컴컴쩡컴컴쩡컴컴쩡컴컴쩡컴컴컴컴컴� 쿎ODE � COMMAND � BIT3� BIT2� BIT1� BIT0� REMARKS � 쳐컴컴탠컴컴컴컴컴컴컴컴컴컴탠컴컴탠컴컴탠컴컴탠컴컴탠컴컴컴컴컴� � 0x � INVALID � X � X � X � X � � 쳐컴컴탠컴컴컴컴컴컴컴컴컴컴탠컴컴탠컴컴탠컴컴탠컴컴탠컴컴컴컴컴� � 1x � 8-BIT & 2-BIT DAC � - � DMA � 2BIT� 2BIT� 10:DIRECT � 쳐컴컴탠컴컴컴컴컴컴컴컴컴컴탠컴컴탠컴컴탠컴컴탠컴컴탠컴컴컴컴컴� � 2x � 8-BIT ADC � - � DMA � X 쿝EF X� 20:DIRECT � 쳐컴컴탠컴컴컴컴컴컴컴컴컴컴탠컴컴탠컴컴탠컴컴탠컴컴탠컴컴컴컴컴� � 3x � MIDI 쿥R/RD� X � X 쿔/REA� � 쳐컴컴탠컴컴컴컴컴컴컴컴컴컴탠컴컴탠컴컴탠컴컴탠컴컴탠컴컴컴컴컴� � 4x � SET TIME CONSTANT � X � X � X � X � � 쳐컴컴탠컴컴컴컴컴컴컴컴컴컴탠컴컴탠컴컴탠컴컴탠컴컴탠컴컴컴컴컴� � 5x � (Reserved) � � � � � � 쳐컴컴탠컴컴컴컴컴컴컴컴컴컴탠컴컴탠컴컴탠컴컴탠컴컴탠컴컴컴컴컴� � 6x � (Reserved) � � � � � � 쳐컴컴탠컴컴컴컴컴컴컴컴컴컴탠컴컴탠컴컴탠컴컴탠컴컴탠컴컴컴컴컴� � 7x � 4-BIT & 2.6-BIT DAC � - � DMA �2.6BT� REF � � 쳐컴컴탠컴컴컴컴컴컴컴컴컴컴탠컴컴탠컴컴탠컴컴탠컴컴탠컴컴컴컴컴� � 8x � (Reserved) � � � � � � 쳐컴컴탠컴컴컴컴컴컴컴컴컴컴탠컴컴탠컴컴탠컴컴탠컴컴탠컴컴컴컴컴� � 9x � ---- � � � � � � 쳐컴컴탠컴컴컴컴컴컴컴컴컴컴탠컴컴탠컴컴탠컴컴탠컴컴탠컴컴컴컴컴� � Ax � ---- � � � � � � 쳐컴컴탠컴컴컴컴컴컴컴컴컴컴탠컴컴탠컴컴탠컴컴탠컴컴탠컴컴컴컴컴� � Bx � ---- � � � � � � 쳐컴컴탠컴컴컴컴컴컴컴컴컴컴탠컴컴탠컴컴탠컴컴탠컴컴탠컴컴컴컴컴� � Cx � ---- � � � � � � 쳐컴컴탠컴컴컴컴컴컴컴컴컴컴탠컴컴탠컴컴탠컴컴탠컴컴탠컴컴컴컴컴� � Dx 쿏MA & SPEAKER CONTROL� X 쿝/DMA쿚F/ON쿐D/SC� � 쳐컴컴탠컴컴컴컴컴컴컴컴컴컴탠컴컴탠컴컴탠컴컴탠컴컴탠컴컴컴컴컴� � Ex � (Reserved) � � � � � � 쳐컴컴탠컴컴컴컴컴컴컴컴컴컴탠컴컴탠컴컴탠컴컴탠컴컴탠컴컴컴컴컴� � Fx � ---- � � � � � � 읕컴컴좔컴컴컴컴컴컴컴컴컴컴좔컴컴좔컴컴좔컴컴좔컴컴좔컴컴컴컴컴� 11-12 ========================================================================== Summary of DSP I/O Ports I/O Description I/O Adress --- -------------- ---------- WRITE DSP RESET = OUT 2x6H,1; WAIT 3 uS; OUT 2x6H,0 WRITE DATA/COMMAND = 2xCH READ WRITE-BUFFER STATUS = 2xCH/D7=0, buffer free READ READ DATA = 2xAH READ DATA-AVAILABLE STATUS = 2xEH/D7=1, data available